Modern computer systems are designed with heterogeneous processing units that perform data processing operations on data values stored in memory. One example of such a system comprises a processing unit with a 40-bit address bus that can address 240 bytes; a 232-byte (4 GB) addressable memory region of DRAM; and one or more small addressable memory regions, such that the sum of all addressable memory regions is significantly less than 240 bytes (1 TB). To access a particular data value, a processing unit implements a request address bus that designates the memory location to be accessed.
Processing units may communicate with other processing units and memory through a transport mechanism. In such a system, addresses may be transmitted between units via buses in the transport mechanism and may be stored in transaction tables. If the system contains cache coherent processing units, addresses may also be stored in cache tags. Many processing units and other interconnect agents implement directories. A directory is used to track which agents or processors in the system share data. For every agent that is tracked, there is a tracking bit needed in the tag line of the directory. Thus, as the number of agents grows, the directory size for tracking the information grows exponentially.
Storing full addresses, especially in structures such as cache tags, uses a significant amount of silicon area, which drives manufacturing cost, and transmitting full addresses requires additional wires that further increases silicon area. In addition, operating on full addresses requires significant logic gate delay that limits clock speed and system performance, and all of these artifacts increase the power consumption of the system. Therefore, what is needed is a system and method to track the patterns that represent how data is shared throughout the system and, thereby allow a reduction in the number of patterns that are tracked to help reduce the information stored in a directory.